Digital Sampling [SamplingDi]

When the sampling clock and the sampling times are specified, the digital input is sampled.


Front Panel

 


Block Diagram

 


Sample Explanation

In the initial state, sampling is performed 1000 times with a period of 1 millisecond (1000 µSec), and the result is displayed.

Since the initial state is 1000 samplings with an 1-millisecond period, the result is displayed in 1 second after starting.