Select to set synchronization of counter device
SyncMode |
Initial value: 0 (Stand-alone) |
[Essential]
Select synchronous mode of counter sampling
0:
Stand-alone
1: Master
2: Slave
・ Stand-alone
Specify this when sampling is performed with one counter device
or
when sampling is performed without synchronizing with other
devices
・ Master
Specify this when synchronous sampling is performed with the
target counter board as the master
・ Slave
Specify this when synchronous sampling is performed with the
target counter board as a slave
ExtSignal1 |
Initial value: 0 |
ExtSignal2 |
Initial value: 0 |
ExtSignal3 |
Initial value: 0 |
When using with master or slave, set synchronization
control signal
It is not necessary to specify it standalone
・ In case of master
Specify the signal to be output to the three terminals (ExtSignals 1 to 3) of the synchronous control connector
Value |
Output signal |
0 |
Not Used |
1 |
Software start |
2 |
Software stop |
3 |
Internal clock |
4 |
External clock |
5 |
External start rising |
6 |
External start falling |
7 |
External stop rising |
8 |
External stop falling |
9 |
Sampling clock error |
10 |
End of setting number |
11 |
Count match CH0:REG0 |
12 |
Count match CH1:REG0 |
13 |
Count match CH2:REG0 |
14 |
Count match CH3:REG0 |
15 |
Count match CH4:REG0 |
16 |
Count match CH5:REG0 |
17 |
Count match CH6:REG0 |
18 |
Count match CH7:REG0 |
19 |
Count match CH0:REG1 |
20 |
Count match CH1:REG1 |
21 |
Count match CH2:REG1 |
22 |
Count match CH3:REG1 |
23 |
Count match CH4:REG1 |
24 |
Count match CH5:REG1 |
25 |
Count match CH6:REG1 |
26 |
Count match CH7:REG1 |
Which signal is assigned to each of the three terminals of the synchronous control connector is arbitrary by the user, but we recommend the following assignment as standard and recommended. Synchronization
control signal 1 (ExtSignal1): Clock signal
|
- In case of slave
Specify whether to use each synchronization control signal (ExtSignal 1 ~ 3)
Value |
Use or not |
0 |
Invalid |
1 |
Valid |
