The upper limit of the baud rate is determined by the communication
specifications of the connected device, the quality of the cable used,
the processing capacity (operating speed) and the load (simultaneous execution
with other programs, etc.) of the PC being used.
Additionally, in the case of RS-422A/485 communication, the cable length
can be extended up to 1200m, but if the communication distance is increased,
the baud rate must be lowered.
Therefore, even if the baud rate is within the baud rate listed in the
device specification table, communicating at a speed exceeding this upper
limit may cause communication errors (overrun, parity, framing).
Please actually perform communication using the Diagnosis
Program, etc., and check the configurable baud rate.
The configurable baud rate depends on the specifications of the communication
LSI installed on the device.
A summary is shown below, but for details on the baud rate that can be
set, please refer to the manual for each device.
The devices in the table below have fixed baud rate that can be set.
Please note that baud rate not listed in the table cannot be set.
Target device |
Configurable baud rate |
COM-1(USB)H
|
300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 |
The devices in the table below can flexibly set the baud rate according
to the reference clock for calculation.
Typical baud rate setting examples are shown in the table, but there are
other baud rate that can be set.
Target device |
Baud rate |
Reference clock for calculation |
||
Minimum value |
Maximum value |
Setting example |
|
|
COM-4CN-USB
|
300 |
921600 |
300, 600, 1200, 2400, 4800, 9600, 19200 Setting error 0.1603% |
48,000,000 |
COM-1C-LPE COM-2PC-PE COM-1(LPCI)H
|
50 |
921600 |
50, 75, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 |
921,600 |
COM-1PDH-LPE
|
50 |
921600 |
50, 75, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 |
921,600 |
COM-2CL-PCI
|
50 |
230400 |
50, 75, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 |
921,600 |
※Compatible only when used with CPS-BXC200 CPS-COM-1PC
|
50 |
921600 |
50, 75, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 |
921,600 |
(EXT-A, EXT-B on BX-M210 GPIO model) COM-1C |
50 |
115200 |
50, 75, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200 |
115,200 |
The frequency division register of the LSI installed in the device is set with an integer value.
If the specified baud rate is not an integral
multiple of the reference clock for calculation, the decimal point is
rounded off and set in the LSI's frequency division register (Clock Divisor).
Therefore, depending on the specified baud rate, a setting error may occur
when setting the device's baud rate.
Generally, if the baud rate error is less
than 1%, serial communication is possible without any errors.
However, please confirm that the baud rate is configurable by actually
communicating with the device.
In addition, even if the calculation result of the setting value to the frequency division register is an integer, it cannot be set to a value exceeding the maximum baud rate of the device being used.
<Calculation formula for the setting value
to frequency division register>
Frequency division register (Clock Divisor) = Reference
clock for calculation ÷ Specified baud rate
Reference clock for calculation=48,000,000Hz(48MHz),
Specified baud rate 9,600[bps]
The calculation result is 5,000, so the setting value
to the frequency division register is 5,000, and no setting error occurs.
(Details)
Frequency division register (Clock Divisor) = Reference
clock for calculation ÷ Specified baud rate
= 48,000,000Hz ÷ 9,600bps
= 5,000
Operating baud rate [bps]
= Reference clock for calculation ÷ Set value of frequency division register
= 48,000,000Hz ÷ 5,000
= 9,600bps
Setting error [%] = ((Operating
baud rate - Specified baud rate) ÷ Specified baud rate) x 100
= ((9,600bps - 9,600bps) ÷ 9,600bps) x 100
= 0%
Reference clock for calculation=48,000,000Hz(48MHz),
Specified baud rate 115,200[bps]
The calculation result is 416.66666, so the setting value
to the frequency division register is 416, which causes a setting error
of 0.1603%.
(Details)
Frequency division register
(Clock Divisor) = Reference clock for calculation ÷ Specified baud rate
= 48,000,000Hz ÷ 115,200bps
= 416.66666 ※416 is set to the frequency division register
Operating baud rate [bps]
= Reference clock for calculation ÷ Set value of frequency division register
= 48,000,000Hz ÷ 416
= 115,384.6153bps
Setting error [%] = ((Operating
baud rate - Specified baud rate) ÷ Specified baud rate) x 100
= ((115,384.6153bps - 115,200bps) ÷ 115,200bps) x 100
= 0.1603%