Function
Sets the counter mode.
Format
Ret = SmcWSetCounterMode( Id, AxisNo, ClearCntLtc, LtcMode, ClearCntClr, ClrMode )
Parameters
Id [ C, C++: short ] [ Python: ctypes.c_short ]
Specify the device ID retrieved by SmcWInit function.
AxisNo [ C, C++: short ] [ Python: ctypes.c_short ]
Specify the axis number.
ClearCntLtc [ C, C++: short ] [ Python: ctypes.c_short ]
Set the type of counter you want to clear when the LTC signal changs from OFF to ON.
0 |
Do not clear the counter |
1 |
Clear the output pulse counter |
2 |
Clear the encoder counter |
3 |
Clear the output pulse counter and encoder counter |
LtcMode [ C, C++: short ] [ Python: ctypes.c_short ]
Set the type of counter you want to latch when the LTC signal comes in.
0 |
Do not use latch function |
1 |
Latch the output pulse counter |
2 |
Latch the encoder counter |
3 |
Latch the output pulse counter and encoder counter |
ClearCntClr [ C, C++: short ] [ Python: ctypes.c_short ]
Set the type of counter you want to clear when the CLR signal changes from OFF to ON.
0 |
Do not clear the counter |
1 |
Clear the output pulse counter |
2 |
Clear the encoder counter |
3 |
Clear the output pulse counter and encoder counter |
ClrMode (Reserved) [ C, C++: short ] [ Python: ctypes.c_short ]
0 fixed.
Return Value
Ret [ C, C++: long ] [ Python: ctypes.c_long ]
0 |
Terminated normally |
Non-zero |
Terminated abnormally |
See also: Error code details
Initial Value
ClearCntLtc |
0H : Do not clear |
LtcMode |
0H : Unused |
ClearCntClr |
0H : Do not clear |
ClrMode |
0 (Fixed) |
Remarks
When the bit4(LTC) of CtrlIn
of the SmcWSetCtrlTypeIn function
is not ON, it is not recognized as LTC signal.
It is necessary to latch the counter when counter clear is performed by
LTC signal. Therefore, the LtcMode bit becomes ON automatically when the
ClearCntLtc bit is ON.
The counter can not be selected
when it is being latched when use SMC-4/8DF series. Therefore, if latch
ON setting is being set by LtcMode, other bits also become ON setting.
Every latched counter value can be read by the function that reads the
latch counter.
The CLR signal is valid only for SMC-4/8DF series. Therefore, the ClearCntClr
is invalid for SMC-2/4/8DL series.
This function cannot be executed when the device is in operation.
After "Initial Setting function" is executed, it is necessary to execute SmcWSetInitParam.
Refer to "About Initial Setting function".
Example
Information on the encoder
counter of axis number 1 is set.
When the LTC signal changes into OFF to ON, it doesn't clear.
When the LTC signal is input, the output pulse counter is not used.
When the CLR signal changes into OFF to ON, it doesn't clear.
C, C++
long Ret;
short ClearCntLtc ;
short LtcMode ;
short ClearCntClr ;
short ClrMode ;
ClearCntLtc = 0;
LtcMode = 0;
ClearCntClr = 0;
ClrMode = 0;
Ret = SmcWSetCounterMode( Id , 1, ClearCntLtc , LtcMode , ClearCntClr , ClrMode );
Python
Ret = ctypes.c_long()
ClearCntLtc = ctypes.c_short()
LtcMode = ctypes.c_short()
ClearCntClr = ctypes.c_short()
ClrMode = ctypes.c_short()
ClearCntLtc.value = 0
LtcMode.value = 0
ClearCntClr.value = 0
ClrMode.value = 0
Ret.value = csmc.SmcWSetCounterMode( Id , 1, ClearCntLtc , LtcMode , ClearCntClr , ClrMode )
See Also